Relocation and Defragmentation for Heterogeneous Reconfigurable Systems

Current FPGAs are heterogeneous partially reconfigurable architectures, consisting of several resource types, e. g., logic cells and embedded memory. By using partial reconfiguration, arbitrary hardware tasks can be placed and removed at run-time, causing the free FPGA resources to become fragmented over time. This fragmentation can prevent a requested task from being placed, if the required FPGA resources are not available in a sufficiently large contiguous region. A solution to this problem is to relocate the currently placed tasks for being able to place the requested task. This paper introduces a run-time defragmentation algorithm, which relocates currently placed tasks on a heterogeneous FPGA area. Additionally, the necessary hardware mechanism for relocating a task at run-time are described. Simulation results for dynamically reconfiguring Xilinx VirtexII FPGAs are presented, which show the improvement of the placement when using the proposed defragmentation algorithm.